1. Field of the Invention
This invention relates to an integrated circuit memory device protected from soft errors induced by alpha particles.
2. Background Art
Memory cells in integrated circuits, consisting of cross-coupled transistors forming a flip-flop circuit, are subject to soft errors caused by parasitic charges generated by alpha particles striking the integrated circuit structure (alpha strike). Such alpha particles, which may come from the ceramics used in packaging the integrated circuit, generate electron-hole pairs in the incident path of the alpha particles due to their energy loss. These electron-hole pairs may generate a parasitic noise current which may result in turning on the off transistor in the flip-flop circuit of the memory cell to cause a soft error.
It is known that the problem of alpha strike can be reduced or eliminated by reducing the thickness and/or resistivity of the epitaxial silicon layer separating the buried collector layer from the base which effectively raises the collector-base capacitance. Increasing the collector-base capacitance increases the time constant of the memory cell and, therefore, the time required for the flip-flop circuit of the memory cell to invert from one stable state to the other is increased. This increases the immunization of the circuit to parasitic charges generated by alpha particles which tend to be instantaneous.
However, this increased capacitance degrades performance of the integrated circuit structure or chip by slowing down the logic circuit portions due to the increased time constant resulting from the modification to the epitaxial layer.
Kato et al U.S. Pat. No. 4,314,359 addressed this problem by selective heavy doping of an N+ buried collector layer in only the memory portion of an integrated circuit structure with ion-implanted arsenic. This provides auto-doping of a region over the buried layer to effectively reduce the collector-base spacing and thereby increase the collector-base capacitance in only the memory cell area.
However, it is difficult to grow epitaxial silicon over ion-implanted silicon without generating defects in the silicon. Furthermore, out diffusion or autodoping is difficult to control to obtain a precise desired level of capacitance. If the region is under doped, i.e., the out diffusion is not sufficient, the capacitance increase will not be sufficient to obtain the desired increased time constant, and the cell will still be prone to soft errors from alpha particles. On the other hand, if the out diffusion is large some of the dopant may get into the active base region above, increasing the beta of the transistor.
It would, therefore, be desirable to provide an integrated circuit structure wherein the memory cell portion of the circuit was protected from alpha strike without degradation of the performance of the logic portion of the circuit in a manner, which is simple and easily controlled, and which does not cause silicon crystal defects.